Adaptive sampling frequency based phase locking scheme for single-phase grid converters

Vineet Vajpayee*, P. Sumathi

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An adaptive phase locking scheme (PLL) is proposed for single-phase systems based on sampling frequency control. The proposed PLL has been designed to synchronize reference signal with the incoming signal by adaptively adjusting the sampling frequency. The efficiency of the proposed adaptive phase locking scheme has been validated through simulation results. The phase locking scheme is also tested for normal as well as polluted frequency environment such as the presence of harmonics. The PLL exhibits the quick acquisition behavior while tracking the wide variation in the frequency and phase of the incoming signal. The PLL parameters like lock-in-range., pull-in-range., and hold-in-range are determined for the proposed scheme which demonstrates the application of the scheme also in demodulation techniques.

Original languageEnglish
Title of host publicationInternational Conference on Communication and Signal Processing, ICCSP 2013 - Proceedings
PublisherIEEE
Pages293-297
Number of pages5
ISBN (Electronic)978-1-4673-4866-9
ISBN (Print)978-1-4673-4865-2
DOIs
Publication statusPublished - 16 Aug 2013
Event2nd International Conference on Communication and Signal Processing - Melmaruvathur, Tamilnadu, India
Duration: 3 Apr 20135 Apr 2013

Conference

Conference2nd International Conference on Communication and Signal Processing
Abbreviated titleICCSP 2013
CountryIndia
CityMelmaruvathur, Tamilnadu
Period3/04/135/04/13

Keywords

  • Adaptive sampling frequency
  • digital phase locked loop
  • synchronization

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