Splotch: porting and optimizing for the Xeon Phi

Tim Dykes, C. Gheller, M. Rivi, Mel Krokos

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Abstract

With the increasing size and complexity of data produced by large-scale numerical simulations, it is of primary importance for scientists to be able to exploit all available hardware in heterogenous high-performance computing environments for increased throughput and efficiency. We focus on the porting and optimization of Splotch, a scalable visualization algorithm, to utilize the Xeon Phi, Intel’s coprocessor based upon the new many integrated core architecture. We discuss steps taken to offload data to the coprocessor and algorithmic modifications to aid faster processing on the many-core architecture and make use of the uniquely wide vector capabilities of the device, with accompanying performance results using multiple Xeon Phi. Finally we compare performance against results achieved with the Graphics Processing Unit (GPU) based implementation of Splotch.
Original languageEnglish
Article number6
Pages (from-to)550-563
Number of pages14
JournalInternational Journal of High Performance Computing Applications
Volume31
Issue number6
Early online date20 Jul 2016
DOIs
Publication statusPublished - 1 Nov 2017

Keywords

  • Xeon Phi
  • high-performance computing
  • visualization
  • optimization
  • GPU

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