The standard cell SiC die embedding high performance and scalable power electronics integration approach

This paper presents a new power electronic packaging approach termed Standard cell, comprising a step-etched active metal brazed (AMB) substrate and a flexible printed circuit board (flex-PCB). The Standard cell exhibits high thermal conductivity, complete electrical insulation, and minimal stray inductance, enhancing SiC MOSFET device performance. It achieves a stray power loop inductance below 1 nH and gate loop inductance under 1.5 nH. Furthermore, the standard cell facilitates symmetrical paralleling of SiC dies, enabling a higher current rating with equal current sharing between the paralleled dies. This paper outlines the design concept of the Standard cell and validates its effectiveness through experimentation.